1. FIELD OF THE INVENTION
The present invention relates to a limiter circuit suited for use in a vehicle mounted receiver, and more particularly to a limiter circuit for limiting a pulsive noise superimposed on an modulating signal.
2. DESCRIPTION OF THE PRIOR ART
A vehicle-mounted receiver such as a radio receiver or a CB tranceiver is apt to be subjected to the influence of a pulsive noise produced by an internal combustion engine of an automobile. Accordingly, the vehicle-mounted receiver usually has a limiter circuit for limiting the pulsive noise.
An example of a prior art limiter circuit is shown in FIG. 1, in which connected between an anode of a detecting diode 11 of a detector circuit 10, that is, a detection signal input terminal T.sub.1 and a detection signal output terminal T.sub.2 are a limiting diode 21, dividing resistors 22 and 23 for dividing a modulation signal (demodulation signal) and a D.C. voltage appearing at the input terminal T.sub.1 and supplying the divided voltage to the anode of the limiting diode 21, resistors 31 and 32 for deriving only the D.C. component from the modulation signal and the D.C. voltage appearing at the input terminal T.sub.1 and supplying the D.C. component to a cathode of the limiting diode 21, and a filtering circuit 30 comprising a large capacitance capacitor 33. During normal reception of the signal, the detecting diode 11 is biased to its conductive state and the limiting diode 21 is biased to its cut off state when the pulsive noise is superimposed on the modulation signal so that the pulsive noise exceeds a level of AM 100% modulation and a potential at the anode of the limiting diode 21 falls below a potential at the cathode thereof by the pulsive noise limiting the pulsive noise.
FIGS. 2A and 2B show waveforms for explaining the operation of the limiter circuit. In FIGS. 2A and 2B, line 1 represents a ground potential, line 2 represents a D.C. bias potential at the cathode of the limiting diode 21, a line 3 represent a D.C. bias potential at the anode of the limiting diode 21, a curve 4 represents a modulation signal at 100% modulation of an AM carrier, numeral 5 represents a pulsive noise superimposed on the modulation signal 4, a curve 4' represents a modulation signal when the percent modulation of the AM carrier is below 100%, and numeral 5' represents a pulsive noise superimposed on the modulation signal 4'.
In the limiter circuit shown in FIG. 1, a limiting level is determined by a D.C. voltage (AGC voltage) produced in accordance with the level of the carrier. Thus, when the limiting level is set to the amplitude of the modulation signal at 100% modulation of the AM carrier, the noise 5 shown in FIG. 2A can be fully limited at the high percent modulation, but the pulsive noise appears at a high amplitude and the limiting effect is materially reduced at a low percent modulation as shown in FIG. 2B.
If the limiting level is lowered to avoid the above problem, the modulation signal at the high percent modulation will also be limited so that the waveform of the modulation signal will be distored. Accordingly, a trade-off of the limiting level at an appropriate level has been obliged.
Furthermore, the limiter circuit of FIG. 1 is not suited for construction in an IC structure in view of a large number of capacitors used.